RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1179
Dec 10, 2015
(14) LIN/UART Transmission Control Register (LTRCn)
Address: F06D0H
7 6 5 4 3 2 1 0
— — — — — —
RTS
—
Value after reset:
0 0 0 0 0 0 0 0
Bit Symbol Bit Name Function R/W
0 — Reserved This bit is always read as 0. The write value should always
be 0.
R/W
1 RTS UART Buffer Transmission Start 0: UART buffer transmission is disabled.
1: UART buffer transmission is enabled.
R/W
2 — Reserved This bit is always read as 0. The write value should always
be 0.
R/W
7 to 3 — Reserved These bits are always read as 0. The write value should
always be 0.
R/W
RTS bit (UART buffer transmission start bit)
Set the RTS bit to 1 to transmit data from UART buffer.
Only 1 can be written to this bit; 0 cannot be written.
Write a value to this bit when the UTOE bit in the LUOERn register is 1 (transmission is enabled) and the UTS bit in the
LSTn register is 0 (transmission not in progress).
Once set, whether or not an error has occurred, this bit is automatically cleared to 0 upon completion of transmission of the
amount of data corresponding to the setting for the number of data units (by the MDL bits in the LDFCn register).
This bit is automatically cleared to 0 upon transition to LIN reset mode.
Writing a value to this bit is disabled when the OMM0 bit in the LMSTn register is 0 (LIN reset mode).
When 1 is to be written to this bit while the setting of the UTSW bit in the LDFCn register is 1 (requesting transmission from
the UART buffer after the completion of waiting for stop bit reception), only do so after the reception of a stop bit.
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