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Renesas RL78 Series - Page 1220

Renesas RL78 Series
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RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1188
Dec 10, 2015
(21) LIN/UART Data Buffer m Register (LDBnm) (m = 1 to 8)
Address: LDBn1 F06D8H, LDBn2 F06D9H, LDBn3 F06DAH, LDBn4 F06DBH, LDBn5 F06DCH, LDBn6 F06DDH, LDBn7 F06DEH, LDBn8 F06DFH
7 6 5 4 3 2 1 0
Value after reset:
0 0 0 0 0 0 0 0
Bit Function
Setting
Range
R/W
7 to 0 Sets the data to be transmitted from the UART buffer. 00H to FFH R/W
These registers set the data to be transmitted from the UART buffer.
Write to these registers while the RTS bit is 0 (UART buffer transmission is disabled).
For details of the UART buffer, refer to 17.5,3 Buffer Processing of Transmission Data.

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