EasyManua.ls Logo

Renesas RL78 Series - Page 1219

Renesas RL78 Series
1879 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1187
Dec 10, 2015
(20) UART Data Buffer 0 Register (LUDBn0)
Address: F06D7H
7 6 5 4 3 2 1 0
Value after reset:
0 0 0 0 0 0 0 0
Bit Function
Setting
Range
R/W
7 to 0 Sets the data to be transmitted from the UART buffer. 00H to FFH R/W
The LUDBn0 register sets the data to be first transmitted from the UART buffer for nine-data-long transmission (the MDL
bits in the LDFCn register is 0H or 9H).
Write to the LUDBn0 register while the RTS bit is 0 (UART buffer transmission is disabled).
For details of the UART buffer, refer to 17.5,3 Buffer Processing of Transmission Data.

Table of Contents

Other manuals for Renesas RL78 Series

Related product manuals