Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1207
Dec 10, 2015
(c) Response Reception
Figure 17-12 shows the operation of the LIN/UART module (LIN slave mode) in response reception. Table 17-
12 provides processing in response reception.
Figure 17-12. Operation in Response Reception
Table 17-12. Processing in Response Reception
Step
Software processing LIN/UART module processing
(1)
 Sets the LDFCn register.
 Sets the RTS bit in the LTRCn register
to 1 (response transmission/reception
started).
 Waits for the setting by software of the RTS bit or the LNRR bit in the LTRCn
register.
 Waits for detection of the start bit.
(2) Waits for an interrupt request. Receives the data 1 when the start bit is detected.
(3) Sets the successful data 1 reception flag.
(4)
 Receives the data 2 when the start bit is detected.
 Receives the data 3 when the start bit is detected.
Repeats the transmission of inter-byte spaces as many times as the data
length specified in bits RFDL[3:0] in the LDFCn register, and stops the
transmission when any bit in the LESTn register is 1 (bit error detected). If an
error occurs, the checksum determination in item (5) is not performed).
:
 Receives the checksum when the start bit is detected.
(5)
 Determines the checksum.
 Sets a successful frame/wake-up reception flag or an error flag.
 Sets the RTS bit in the LTRCn register to 0 (response transmission/reception
stopped).
(6)
 Processing after communication
Reads the received data.
Checks the LSTn register and clears
flags.
 Completes the response process.
 Waits for a new break.
The LIN/UART module can receive a break field during the transmission or reception of a frame. Here, a reception status
interrupt might be generated on the detection of a framing error, bit error, etc, at the position of the stop bit of the frame
preceding break field reception.
For information about error detection, refer to 17.4.6 Error Status.
Interrupt
Header
ID + parity
Response space
Response
Data 1
Data field
Data 2
Data field
Inter-byte space
Checksum
Checksum
Inter-frame space
(1) (3)(2) (5) (6)
(4)

Renesas RL78 Series Specifications

General

Brand	Renesas
Model	RL78 Series
Category	Computer Hardware
Language	English