RL78/F13, F14 CHAPTER 23 STANDBY FUNCTION
R01UH0368EJ0210 Rev.2.10 1533
Dec 10, 2015
(2) STOP mode release
The STOP mode can be released by interrupt and reset signal generation.
(a) Release by unmasked interrupt request
When an interrupt request with an interrupt mask set to 0 (Interrupt servicing enabled) is generated, the STOP
mode is released. After the oscillation stabilization time has elapsed, if interrupt acknowledgment is enabled,
vectored interrupt servicing is carried out. If interrupt acknowledgment is disabled, the next address instruction of
the STOP instruction is executed.
Figure 23-6. STOP Mode Release by Interrupt Request Generation (1/2)
(1) When high-speed system clock (X1 oscillation) is used as CPU clock
Notes 1. For details of the standby release signal, see Figure 21-1. Basic Configuration of Interrupt Function.
2. STOP mode release time
Supply of the clock is stopped
When FRQSEL4 = 1 in the user option byte (000C2H/020C2H):
18 s to "whichever is longer 105 s and the oscillation stabilization time (set by STS)"
When FRQSEL4 = 0 in the user option byte (000C2H/020C2H):
18 s to "whichever is longer 65 s and the oscillation stabilization time (set by OSTS)"
Wait
When vectored interrupt servicing is carried out: 10 to 11 clocks
When vectored interrupt servicing is not carried out: 4 to 5 clocks
Remarks 1. The clock supply stop time varies depending on the temperature conditions and STOP mode period.
2. The broken lines indicate the case when the interrupt request that has released the standby mode is
acknowledged.
Normal operation
(high-speed
system clock)
Oscillates
Normal operation
(high-speed
system clock)
Oscillates
STOP mode
Oscillation stopped
Standby release
signal
Note 1
High-speed
system clock
(X1 oscillation)
Status of CPU
STOP
instruction
Interrupt
request
Wait
Supply of the
clock is stopped
STOP mode
release time
Note 2
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