Renesas RL78 Series

RL78/F13, F14 CHAPTER 27 SAFETY FUNCTIONS
R01UH0368EJ0210 Rev.2.10 1583
Dec 10, 2015
Figure 27-1. Format of Flash Memory CRC Control Register (CRC0CTL)
Address: F02F0H After reset: 00H R/W
Symbol <7> 6 5 4 3 2 1 0
CRC0CTL CRC0EN 0 FEA5 FEA4 FEA3 FEA2 FEA1 FEA0
CRC0EN Control of high-speed CRC ALU operation
0 Stop the operation.
1 Start the operation according to HALT instruction execution.
FEA5 FEA4 FEA3 FEA2 FEA1 FEA0 High-speed CRC operation range
0 0 0 0 0 0 00000H to 3FFBH (16 Kbytes - 4 bytes)
0 0 0 0 0 1 00000H to 7FFBH (32 Kbytes - 4 bytes)
0 0 0 0 1 0 00000H to BFFBH (48 Kbytes - 4 bytes)
0 0 0 0 1 1 00000H to FFFBH (64 Kbytes - 4 bytes)
0 0 0 1 0 0 00000H to 13FFBH (80 Kbytes - 4 bytes)
0 0 0 1 0 1 00000H to 17FFBH (96 Kbytes - 4 bytes)
0 0 0 1 1 0 00000H to 1BFFBH (112 Kbytes - 4 bytes)
0 0 0 1 1 1 00000H to 1FFFBH (128 Kbytes - 4 bytes)
0 0 1 0 0 0 00000H to 23FFBH (144 Kbytes - 4 bytes)
0 0 1 0 0 1 00000H to 27FFBH (160 Kbytes - 4 bytes)
0 0 1 0 1 0 00000H to 2BFFBH (176 Kbytes - 4 bytes)
0 0 1 0 1 1 00000H to 2FFFBH (192 Kbytes - 4 bytes)
0 0 1 1 0 0 00000H to 33FFBH (208 Kbytes - 4 bytes)
0 0 1 1 0 1 00000H to 37FFBH (224 Kbytes - 4 bytes)
0 0 1 1 1 0 00000H to 3BFFBH (240 Kbytes - 4 bytes)
0 0 1 1 1 1 00000H to 3FFFBH (256 Kbytes - 4 bytes)
Other than the above Setting prohibited
Remark Input the expected CRC operation result value to be used for comparison in the lowest 4 bytes of the
flash memory. Note that the operation range will thereby be reduced by 4 bytes.
The lowest 4 bytes of 16 Kbytes are used to store the expected value, so operation is not performed
on these bytes.