RL78/F13, F14 CHAPTER 27 SAFETY FUNCTIONS
R01UH0368EJ0210 Rev.2.10 1584
Dec 10, 2015
(2) Flash memory CRC operation result register (PGCRCL)
This register is used to store the high-speed CRC operation results.
The PGCRCL register can be set by a 16-bit memory manipulation instruction.
Reset signal generation clears this register to 0000H.
Figure 27-2. Format of Flash Memory CRC Operation Result Register (PGCRCL)
Address: F02F2H After reset: 0000H R/W
Symbol 15 14 13 12 11 10 9 8
PGCRCL PGCRC15 PGCRC14 PGCRC13 PGCRC12 PGCRC11 PGCRC10 PGCRC9 PGCRC8
7 6 5 4 3 2 1 0
PGCRC7 PGCRC6 PGCRC5 PGCRC4 PGCRC3 PGCRC2 PGCRC1 PGCRC0
PGCRC15 to PGCRC0 High-speed CRC operation results
0000H to FFFFH Store the high-speed CRC operation results.
Caution The PGCRCL register can only be written if CRC0EN (bit 7 of the CRC0CTL register) = 1.
Figure 27-3 shows the flowchart of flash memory CRC operation function (high-speed CRC).
To Next Page
Loading...
