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Renesas RL78 Series User Manual

Renesas RL78 Series
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RL78/F13, F14 CHAPTER 27 SAFETY FUNCTIONS
R01UH0368EJ0210 Rev.2.10 1594
Dec 10, 2015
ECCRV0 ECC code inversion bit 0
0 Bit 0 of ECC code not inverted.
1 Bit 0 of ECC code inverted.
DWRV7 Write data inversion bit 7
0 Bit 7 of write data not inverted.
1 Bit 7 of write data inverted.
DWRV6 Write data inversion bit 6
0 Bit 6 of write data not inverted.
1 Bit 6 of write data inverted.
DWRV5 Write data inversion bit 5
0 Bit 5 of write data not inverted.
1 Bit 5 of write data inverted.
DWRV4 Write data inversion bit 4
0 Bit 4 of write data not inverted.
1 Bit 4 of write data inverted.
DWRV3 Write data inversion bit 3
0 Bit 3 of write data not inverted.
1 Bit 3 of write data inverted.
DWRV2 Write data inversion bit 2
0 Bit 2 of write data not inverted.
1 Bit 2 of write data inverted.
DWRV1 Write data inversion bit 1
0 Bit 1 of write data not inverted.
1 Bit 1 of write data inverted.
DWRV0 Write data inversion bit 0
0 Bit 0 of write data not inverted.
1 Bit 0 of write data inverted.
Cautions 1. Access the ECCDWRVR register in word units.
2. Bits 13 to 15 of the ECCDWRVR register are always read as 0. The write value should always
be 0.
3. All data written to the RAM, including data written to the stack, is inverted. Therefore, all
peripheral functions that might rewrite the RAM must be stopped before a write data
inversion bit is set. Do not set a write data inversion bit during OCD.

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Renesas RL78 Series Specifications

General IconGeneral
CoreRL78
CPU Clock SpeedUp to 32 MHz
Flash MemoryUp to 512 KB
RAMUp to 32 KB
Operating Voltage1.6 V to 5.5 V
Low Power ModesHALT, STOP, SNOOZE
CPU Architecture16-bit
Temperature Range-40°C to +85°C
PackageLQFP
Timers16-bit timers
Communication InterfacesUART, I2C, LIN
A/D Converter12-bit

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