Renesas RL78 Series - Page 21

Index-15
16.5.17 Timing of I
2
C interrupt request (INTIICA0) occurrence ............................................................. 1066
16.6 Timing Charts ......................................................................................................................... 1087
CHAPTER 17 LIN/UART MODULE (RLIN3) ....................................................................................... 1102
17.1 Overview .................................................................................................................................. 1102
17.2 Register Descriptions ............................................................................................................ 1107
17.2.1 LIN Registers for Master Mode ................................................................................................... 1109
17.2.2 LIN Registers for Slave Mode ..................................................................................................... 1137
17.2.3 Registers for UART .................................................................................................................... 1165
17.3 Modes ...................................................................................................................................... 1195
17.3.1 LIN Reset Mode ......................................................................................................................... 1197
17.3.2 LIN Mode .................................................................................................................................... 1198
17.3.3 UART Mode ................................................................................................................................ 1200
17.3.4 LIN Self-Test Mode .................................................................................................................... 1200
17.4 LIN Mode ................................................................................................................................. 1201
17.4.1 Operation Overview .................................................................................................................... 1201
17.4.2 Data Transmission/Reception .................................................................................................... 1209
17.4.3 Transmission/Reception Data Buffering ..................................................................................... 1211
17.4.4 Wake-up Transmission/Reception .............................................................................................. 1214
17.4.5 Status ......................................................................................................................................... 1216
17.4.6 Error Status ................................................................................................................................ 1218
17.5 UART Mode ............................................................................................................................. 1224
17.5.1 Operation Overview .................................................................................................................... 1224
17.5.2 Data Transmission/Reception .................................................................................................... 1239
17.5.3 Buffer Processing of Transmission Data .................................................................................... 1241
17.5.4 Status ......................................................................................................................................... 1242
17.5.5 Error Status ................................................................................................................................ 1243
17.6 LIN Self-Test Mode ................................................................................................................. 1244
17.6.1 Change to LIN Self-Test Mode ................................................................................................... 1245
17.6.2 Transmission in LIN Master Self-Test Mode ............................................................................... 1246
17.6.3 Reception in LIN Master Self-Test Mode .................................................................................... 1247
17.6.4 Transmission in LIN Slave Self-Test Mode ................................................................................. 1248
17.6.5 Reception in LIN Slave Self-Test Mode ...................................................................................... 1249
17.6.6 Terminating LIN Self-Test Mode ................................................................................................. 1250
17.7 Baud Rate Generator .............................................................................................................. 1251
17.7.1 LIN Master Mode ........................................................................................................................ 1251
17.7.2 LIN Slave Mode .......................................................................................................................... 1253
17.7.3 UART Mode ................................................................................................................................ 1255
17.8 Noise Filter .............................................................................................................................. 1256
17.9 Interrupts ................................................................................................................................. 1258