Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 3 CPU ARCHITECTURE
R01UH0368EJ0210 Rev.2.10 195
Dec 10, 2015
Figure 3-60. Example of ES:word[B], ES:word[C]
Figure 3-61. Example of ES:word[BC]
XFFFFH
X0000H
r(B/C)
X0000H
ES
ES: word [B], ES: word [C]
Specifies a
64-Kbyte area
Array of
word-sized
data
Offset
Address of a word within an array
Target memory
Instruction code
<1> <2>
<2>
<3> <3>
<3>
<3>
<1>
<1>
<1>
<2>
<2>
Memory
OP-code
Low Addr.
High Addr.
The ES register <1> specifies a 64-Kbyte area within the overall
1-Mbyte space as the four higher-order bits, X, of the address range.
“word” <2> specifies the address where the target array of word-sized data
starts in the 64-Kbyte area specified in the ES register <1>.
Either register <3> specifies an offset within the array to the target location
in memory
.
X0000H
rp(BC)
X0000H
ES
ES: word [BC]
OP-code
Low Addr.
High Addr.
Specifies a
64-Kbyte area
Offset
<3>
<3>
<1>
Instruction code
<1> <2>
<2>
<3>
<1>
<2>
Target memory
Memory
XFFFFH
Array of
word-sized
data
Address of a word within an array
The ES register <1> specifies a 64-Kbyte area within the
overall 1-Mbyte space as the four higher-order bits, X, of
the address range.
“word” <2> specifies the address where the target array of
word-sized data starts in the 64-Kbyte area specified in the
ES register <1>.
A pair of registers <3> specifies an offset within the array
to the target location in memory
.

Renesas RL78 Series Specifications

General

Brand	Renesas
Model	RL78 Series
Category	Computer Hardware
Language	English