Renesas RL78 Series User Manual

Index-21
23.1.1 Standby function ......................................................................................................................... 1518
23.2 Registers controlling standby function ............................................................................... 1519
23.2.1 Oscillation stabilization time counter status register (OSTC) ...................................................... 1520
23.2.2 Oscillation stabilization time select register (OSTS) ................................................................... 1521
23.2.3 STOP status output control register (STPSTC) .......................................................................... 1522
23.3 Standby Function Operation ................................................................................................. 1523
23.3.1 HALT mode ................................................................................................................................ 1523
23.3.2 STOP mode ................................................................................................................................ 1530
23.3.3 SNOOZE mode .......................................................................................................................... 1536
CHAPTER 24 RESET FUNCTION ...................................................................................................... 1541
24.1 Register for Confirming Reset Source ................................................................................. 1552
24.1.1 Reset control flag register (RESF) .............................................................................................. 1552
24.1.2 POR/CLM reset confirmation register (POCRES) ...................................................................... 1553
CHAPTER 25 POWER-ON-RESET CIRCUIT .................................................................................... 1555
25.1 Functions of Power-on-reset Circuit .................................................................................... 1555
25.2 Configuration of Power-on-reset Circuit .............................................................................. 1556
25.3 Operation of Power-on-reset Circuit .................................................................................... 1556
25.4 Cautions for Power-on-reset Circuit ..................................................................................... 1559
CHAPTER 26 VOLTAGE DETECTOR ................................................................................................ 1561
26.1 Functions of Voltage Detector .............................................................................................. 1561
26.2 Configuration of Voltage Detector ........................................................................................ 1562
26.3 Registers Controlling Voltage Detector ............................................................................... 1562
26.3.1 Voltage detection register (LVIM)................................................................................................ 1563
26.3.2 Voltage detection level register (LVIS) ........................................................................................ 1564
26.4 Operation of Voltage Detector .............................................................................................. 1567
26.4.1 When used as reset mode .......................................................................................................... 1567
26.4.2 When used as interrupt mode .................................................................................................... 1569
26.4.3 When used as interrupt and reset mode .................................................................................... 1571
26.5 Cautions for Voltage Detector ............................................................................................... 1577
26.5.1 Checking reset source ................................................................................................................ 1577
26.5.2 Delay from the time LVD reset source is generated until the time LVD reset has been
generated or released ................................................................................................................ 1578
CHAPTER 27 SAFETY FUNCTIONS .................................................................................................. 1579
27.1 Overview of Safety Functions ............................................................................................... 1579
27.2 Registers Used by Safety Functions .................................................................................... 1581
27.3 Operation of Safety Functions .............................................................................................. 1582

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit