Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 4 PORT FUNCTIONS
R01UH0368EJ0210 Rev.2.10 242
Dec 10, 2015
Figure 4-29. Block Diagram of P54
P54/SSI10/
(TI11)/(TO11)
WR
PU
RD
WR
PORT
PU54
(TO11)
P54
EV DD
P-ch
PU5
P5
WR PM
PM5
PM54
CMOS
(Schmitt3)
TTL
PIM5
PIM54
WR PIM
PITHL5
PITHL54
WR PITHL
CMOS
(Schmitt1)
WR PMS
PMS
PMS0
Internal bus
Output latch
Alternate function
Alternate function
Selector
P5: Port register 5
PU5: Pull-up resistor option register 5
PM5: Port mode register 5
PIM5: Port input mode register 5
PMS: Port mode select register
PITHL5: Port input threshold control register 5
RD: Read signal
WRxx: Write signal

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit