Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 4 PORT FUNCTIONS
R01UH0368EJ0210 Rev.2.10 290
Dec 10, 2015
Figures 4-61 to 4-65 show block diagrams of port 12 for 100-pin products.
Figure 4-61. Block Diagram of P120
P120/ANI25/TI07
/
TO07/TRDIOD0/
SO01/INTP4
WR
PU
RD
WR
PORT
WR PM
PU120
P120
PM120
EV DD
P-ch
PU12
PM12
P12
WR PMC
PMC12
PMC120
WR PMS
WR POM
PMS
PMS0
POM120
POM12
TO07/TRDIOD0
SO01
TI07/TRDIOD0
/INTP4
Internal bus
Output latch
Alternate function
Alternate function
Alternate function
Selector
A/D converter
ADS
ADS4 to ADS0
P12: Port register 12
PU12: Pull-up resistor option register 12
PM12: Port mode register 12
POM12: Port output mode register 12
PMC12: Port mode control register 12
PMS: Port mode select register
ADS: Analog input channel specification register
RD: Read signal
WRxx: Write signal

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit