Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 6 TIMER ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 432
Dec 10, 2015
Figures 6-1 to 6-3 show the block diagrams of the timer array unit.
Figure 6-1. Entire Configuration of Timer Array Unit 0 (Example: 100-pin products)
Remark f
SL: Sub/low-speed on-chip oscillator clock
f
IL: Low-speed on-chip oscillator clock frequency
4
4
44
TIS07 TIS06 TIS04 TIS02 TIS01 TIS00
f CLK
TAU0EN
PRS033 PRS032 PRS031 PRS030 PRS023 PRS022PRS021 PRS020 PRS013 PRS012 PRS011 PRS010 PRS003 PRS002 PRS001 PRS000
f CLK /2
0
- f CLK /2
15
f CLK /2
0
- f CLK /2
15
f CLK /2
0
- f CLK /2
15
f CLK /2
0
- f CLK /2
15
CK03 CK02 CK01 CK00
TI00
f SL
f IL
TI01
TI02
TI03
TI03
TI03
TI04
TI05
TI06
RTC1HZ
TI07
RTC1HZ
RXD0
TIS16 TIS14 TIS12 TIS10TIS17
TO00
INTTM00
INTTM01
INTTM01H
INTTM03
INTTM04
INTTM05
INTTM06
INTTM07
INTTM03H
INTTM02
TO01
TO02
Timer RJ
TO03
TO04
TO05
TO06
TO
07
TO071 TO070
PWM output delay control register 1
TO061 TO060
PWM output delay control register 1
TO051 TO050
PWM output delay control register 1
TO041 TO040
PWM output delay control register 1
TO031 TO030
PWM output delay control register 1
TO021 TO020
PWM output delay control register 1
Timer RJ
TO011 TO010
PWM output delay control register 1
(PWMDLY1)
(PWMDLY1)
(PWMDLY1)
(PWMDLY1)
(PWMDLY1)
(PWMDLY1)
(PWMDLY1)
Timer input select register 1 (TIS1)
Selector Selector Selector Selector Selector Selector Selector Selector
Event input
from ELC
Event input
from ELC
Event input
from ELC
Event input
from ELC
Timer input select register 0 (TIS0)
Timer clock select register 0 (TPS0)
Peripheral enable
register 0 (PER0)
Prescaler
Selector Selector
SelectorSelector
Channel 0
Channel 1
Slave/master controller
Slave/master controller
Delay
controller
Delay
controller
Delay
controller
Delay
controller
Delay
controller
Delay
controller
Delay
controller
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7 (LIN-bus supported)

Renesas RL78 Series Specifications

General

Brand	Renesas
Model	RL78 Series
Category	Computer Hardware
Language	English