RL78/F13, F14 CHAPTER 15 SERIAL ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 872
Dec 10, 2015
(4) Processing flow (in continuous transmission mode)
Figure 15-55. Timing Chart of Slave Transmission (in Continuous Transmission Mode)
(Type 1: DAPmn = 0, CKPmn = 0)
Note If transmit data is written to the SDRmn register while the BFFmn bit of serial status register mn (SSRmn) is
1 (valid data is stored in serial data register mn (SDRmn)), the transmit data is overwritten.
Caution The MDmn0 bit of serial mode register mn (SMRmn) can be rewritten even during operation.
However, rewrite it before transfer of the last bit is started.
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0, 1), p: CSI number (p = 00, 01, 10, 11),
mn = 00, 01, 10, 11
SSmn
SEmn
SDRmn
SCKp pin
SOp pin
Shift
register mn
INTCSIp
TSFmn
BFFmn
MDmn0
STmn
Data transmission (8-bit length)
Data transmission (8-bit length)
Transmit data 2
Transmit data 1
Transmit data 3
Transmit data 2
<1>
<2>
<2>
<2>
<3>
<3>
<3>
<5><4>
(Note)
Shift operation
Shift operation
Shift operation
Transmit data 3
Data transmission (8-bit length)
Transmit data 1
<6>
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