Intel Arria 10 User Manual

Parameter Value
Enable tx_pma_qpipulldn port (QPI) Off
Enable tx_pma_txdetectrx port (QPI) Off
Enable tx_pma_rxfound port (QPI) Off
Enable rx_seriallpbken port On / Off
Table 78. RX PMA Parameters
Parameter Value
Number of CDR reference clocks 1 to 5
Selected CDR reference clock 0 to 4
Selected CDR reference clock frequency Select legal range defined by the Quartus Prime software
PPM detector threshold 100, 300, 500, 1000
CTLE adaptation mode manual,
DFE adaptation mode adaptation enabled, manual, disabled
Number of fixed dfe taps 3, 7, 11
Enable rx_pma_clkout port On / Off
Enable rx_pma_div_clkout port On / Off
rx_pma_div_clkout division factor When Enable rx_pma_div_clkout port is On, then:
Disabled, 1, 2, 33, 40, 66
Enable rx_pma_clkslip port On / Off
Enable rx_pma_qpipulldn port (QPI) Off
Enable rx_is_lockedtodata port On / Off
Enable rx_is_lockedtoref port On / Off
Enable rx_set_locktodata and rx_set_locktoref ports On / Off
Enable rx_seriallpbken port On / Off
Enable PRBS verifier control and status ports On / Off
Table 79. Enhanced PCS Parameters
Parameter Value
Enhanced PCS / PMA interface width 32, 40, 64
FPGA fabric / Enhanced PCS interface width 67
Enable 'Enhanced PCS' low latency mode Allowed when the PMA interface width is 32 and preset
variations for data rate is 10.3125 Gbps or 6.25 Gbps;
otherwise Off
Enable RX/TX FIFO double-width mode Off
TX FIFO mode Interlaken
TX FIFO partially full threshold 8 to 15
TX FIFO partially empty threshold 1 to 8
Enable tx_enh_fifo_full port On / Off
continued...
2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Intel
®
Arria
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10 Transceiver PHY User Guide
108

Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex