Intel Arria 10 User Manual

2.6.4.2. 1G/10GbE PHY Performance and Resource Utilization
This topic provides performance and resource utilization for the 1G/10GbE PHY IP core
in Arria 10 devices.
The following table shows the typical expected resource utilization for selected
configurations using the Quartus Prime software version 15.1. The numbers of ALMs
and logic registers are rounded up to the nearest 50.
Table 128. 1GbE/10GbE PHY Performance and Resource Utilization
Variant ALMs ALUTs Registers M20K
1G/10GbE PHY with IEEE 1588 v2 2650 3950 5100 6
1G/10GbE PHY 1500 2350 2850 2
1G/10GbE PHY with FEC 1500 2350 2850 2
2.6.4.3. 1G/10GbE PHY Functional Description
Figure 73. 1G/10GbE PHY Block Diagram
Sequencer
(Auto-Speed
Detect)
Registers
Block
Reconfiguration
GigE
PCS
1588
FIFO
Auto-Negotiation
Clause 73
Link Training
Clause 72
HSSI Reconfiguration Requests
1588
FIFO
GigE
PCS
Native PHY
TX PMA
RX PMA
40/32
40/32
rx_pld_clk rx_pma_clk
tx_pld_clk tx_pma_clk
tx_pld_clk tx_pma_clk
rx_pld_clk rx_pma_clk
Divide by 33/1/2
Avalon-MM
User PCS Reconfiguration
MGMT_CLK
8 + 2
64 + 8
TX_GMII_DATA
XGMII_TX_CLK
TX_XGMII_DATA
TX_PMA_CLKOUT
RX_XGMII_DATA
64 + 8
8 + 2
XGMII_RX_CLK
RX_GMII_DATA
RX_PMA_CLKOUT
RX_DIV_CLKOUT
40
40
66
PMA Reconfiguration I/F
PCS Reconfiguration I/F
Soft Logic Hard Logic Not Available
Standard RX PCS
Standard TX PCS
Enhanced TX PCS
Enhanced RX PCS
Standard and Enhanced PCS Datapaths
The Standard PCS and PMA inside the Native PHY are configured as the Gigabit
Ethernet PHY. The Enhanced PCS and PMA inside the Native PHY are configured as the
10GBASE-R PHY. Refer to the Standard PCS and Enhanced PCS architecture chapters
for more details.
2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Intel
®
Arria
®
10 Transceiver PHY User Guide
166

Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex