Intel Arria 10 User Manual

Figure 72. Top Level Modules of the 1G/10GbE PHY IP Function
The Enhanced PCS receives and transmits XGMII data. The Standard PCS receives and transmits GMII data.
Intel Device with 10.3125-Gbps Transceivers
1G/10Gb Ethernet PHY Intel FPGA IP Core Function
Native PHY Hard IP
257.8 MHz
161.1 MHz
TX
Serial
Data
RX
Serial
Data
1 Gb SFP /
10 Gb SFP+
or XFP /
1G/10 Gb SFP+
Module/
Standard PHY
Product
1G/ 10 Gb
Ethernet
Network
Interface
322.265625 MHz
or 644.53125 MHz
Reference Clock
125 MHz
Reference Clock
Legend
Hard IP
Soft IP
ATX/CMU
TX PLL
For
10 GbE
CMU
or fPLL
TX PLL
For 1 GbE
1.25 Gb/
10.3125 Gb
Hard PMA
Link
Status
Sequencer
(Optional)
10 Gb
Ethernet
Enhanced PCS
w FEC
1 Gb
Ethernet
Standard
PCS
To/From Modules in the PHY MegaCore
Control and Status
Registers
Avalon-MM
PHY Management
Interface
PCS Reconfig
Request
Optional
1588 TX and
RX Latency
Adjust 1G
and 10G
To/From
1G/10Gb
Ethernet
MAC
RX GMII Data
TX GMII/MII Data
@ 125 MHz
RX XGMII Data
TX XGMII Data
@156.25 MHz
1 GigE
PCS
Reconfiguration
Block
40 64
40 64
Red = With FEC Option
Core Core
For more information about clock and reset signal descriptions, refer to Clock and
Reset Interfaces.
An Avalon-MM slave interface provides access to the 1G/10GbE PHY IP Core registers.
These registers control many of the functions of the other blocks. Many of these bits
are defined in Clause 45 of IEEE 802.3ap-2008 Standard.
Related Information
• Clock and Reset Interfaces on page 168
• IEEE Std 802.3ap-2008 Standard
• Standard for a Precision Clock Synchronization Protocol for Networked
Measurement and Control Systems
2.6.4.1. 1G/10GbE PHY Release Information
This topic provides information about this release of the 1G/10GbE PHY IP Core.
Table 127. 1G/10GbE Release Information
Item Description
Version 16.0
Release Date May 2016
Ordering Codes IP-1G10GBASER (primary)
IPR-1G10GBASER (renewal code)
Product ID 0107
Vendor ID 6AF7
2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Intel
®
Arria
®
10 Transceiver PHY User Guide
165

Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex