Intel Arria 10 User Manual

Document
Version
Changes
Made the following changes to the PMA Architecture section:
• Added 2nd post-tap and pre-tap Pre-Emphasis signals .
• Updated DFE and CTLE modes of operation and Use Models.
• Added new sections on How to Enable CTLE and How to Enable DFE.
• Changed max data rate for GT channels to 25.8 Gbps in the Receiver Buffer CTLE section.
• Updated Receiver Buffer figure by adding and modifying Adaptive Parametric Tuning Engine to
include CDR and DFE.
• Updated VGA section that includes VGA Frequency response for different gain settings.
2013.12.02 Initial release.
5. Arria 10 Transceiver PHY Architecture
UG-01143 | 2018.06.15
Intel
®
Arria
®
10 Transceiver PHY User Guide
501

Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex