Intel Arria 10 User Manual

1. Perform the necessary steps from steps 1 to 7 in Steps to Perform Dynamic
Reconfiguration.
2. Perform a read-modify-write to address 0x006 according to Register Map for PRBS
Generators for bonded and non bonded designs.
3. Perform a read-modify-write to address 0x007 according to Register Map for PRBS
Generators for bonded and non bonded designs.
4. Perform a read-modify-write to address 0x008 according to Register Map for PRBS
Generators for bonded and non bonded designs.
5. Perform a read-modify-write to address 0x110 with the specified width. This data
width is either 64-bit or 10-bit.
6. Perform a read-modify-write to address 0x111 according to Register Map for PRBS
Generators for bonded and non bonded designs. You must read and save the value
in the register 0x111[5:0] before changing the x1_clock_source_sel setting to
xN non bonding.
7. Perform the necessary steps from steps 9 to 12 in Steps to Perform Dynamic
Reconfiguration.
To disable the PRBS generator, write the original values back into the read-modify-
write addresses in Register Map for PRBS Generators for bonded and non bonded
designs.
6.16.1.2.1. Examples of Enabling the PRBS9 and PRBS31 Pattern Generators in bonded
designs
Example 7. Enabling the PRBS9 pattern generator in 10-bit mode
1. Perform the necessary steps from steps 1 to 7 in Steps to Perform Dynamic
Reconfiguration.
2. Perform a read-modify-write to address x006[7:0] with the following bits: 8’b01- -
1100
3. Perform a read-modify-write to address x007[7:0] with the following bits: 8’b0010
- - - -
4. Perform a read-modify-write to address x008[7:0] with the following bits: 8’b -
000 - - - -
5. Perform a read-modify-write to address x110[7:0] with the following bits: 8’b - - -
- - 100
6. Perform a read-modify-write to address x111[5:0] with the following bits:
8'b---11000. You must read and save the value in the register 0x111[5:0] before
changing the x1_clock_source_sel setting to xN non bonding.
7. Perform the necessary steps from steps 9 to 12 in Steps to Perform Dynamic
Reconfiguration.
Note: A dash (-) indicates that the corresponding bit value should not be modified during
read-modify-write.
6. Reconfiguration Interface and Dynamic Reconfiguration
UG-01143 | 2018.06.15
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10 Transceiver PHY User Guide
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Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex