Intel Arria 10 User Manual

Related Information
• Steps to Perform Dynamic Reconfiguration on page 516
• Arbitration on page 512
6.16.1.1.1. Examples of Enabling the PRBS9 and PRBS31 Pattern Generators in non
bonded designs
Example 5. Enabling the PRBS9 pattern generator in 10-bit mode
1. Perform the necessary steps from steps 1 to 7 in Steps to Perform Dynamic
Reconfiguration.
2. Perform a read-modify-write to address x006[7:0] with the following bits: 8’b01- -
1100
3. Perform a read-modify-write to address x007[7:0] with the following bits: 8’b0010
- - - -
4. Perform a read-modify-write to address x008[7:0] with the following bits: 8’b -
000 - - - -
5. Perform a read-modify-write to address x110[7:0] with the following bits: 8’b - - -
- - 100
6. Perform the necessary steps from steps 9 to 12 in Steps to Perform Dynamic
Reconfiguration.
Note: A dash (-) indicates that the corresponding bit value should not be modified during
read-modify-write.
Example 6. Enabling the PRBS31 pattern generator in 64-bit mode
1. Perform the necessary steps from steps 1 to 7 in Steps to Perform Dynamic
Reconfiguration.
2. Perform a read-modify-write to address x006[7:0] with the following bits: 8’b01- -
0100
3. Perform a read-modify-write to address x007[7:0] with the following bits: 8’b0000
- - - -
4. Perform a read-modify-write to address x008[7:0] with the following bits: 8’b -
001 - - - -
5. Perform a read-modify-write to address x110[7:0] with the following bits: 8’b - - -
- - 011
6. Perform the necessary steps from steps 9 to 12 in Steps to Perform Dynamic
Reconfiguration.
Note: A dash (-) indicates that the corresponding bit value should not be modified during
read-modify-write.
Related Information
Steps to Perform Dynamic Reconfiguration on page 516
6.16.1.2. Enabling the PRBS Data Generator in bonded designs
You must perform a sequence of read-modify-writes to addresses 0x006, 0x007,
0x008, and 0x110, 0x111and to enable either the PRBS data generator in bonded
designs. To enable either the PRBS data generator, follow these steps:
6. Reconfiguration Interface and Dynamic Reconfiguration
UG-01143 | 2018.06.15
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Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex