Intel Arria 10 User Manual

7. Calibration.................................................................................................................. 567
7.1. Reconfiguration Interface and Arbitration with PreSICE Calibration Engine .................567
7.2. Calibration Registers...........................................................................................569
7.2.1. Avalon-MM Interface Arbitration Registers................................................. 569
7.2.2. Transceiver Channel Calibration Registers.................................................. 570
7.2.3. Fractional PLL Calibration Registers...........................................................570
7.2.4. ATX PLL Calibration Registers...................................................................571
7.2.5. Capability Registers................................................................................ 571
7.2.6. Rate Switch Flag Register........................................................................ 573
7.3. Power-up Calibration.......................................................................................... 574
7.4. User Recalibration.............................................................................................. 576
7.4.1. Recalibration After Transceiver Reference Clock Frequency or Data Rate
Change.................................................................................................579
7.5. Calibration Example............................................................................................581
7.5.1. ATX PLL Recalibration............................................................................. 581
7.5.2. Fractional PLL Recalibration..................................................................... 581
7.5.3. CDR/CMU PLL Recalibration..................................................................... 582
7.5.4. PMA Recalibration...................................................................................582
7.6. Calibration Revision History................................................................................. 583
8. Analog Parameter Settings........................................................................................ 585
8.1. Making Analog Parameter Settings using the Assignment Editor................................585
8.2. Updating Quartus Settings File with the Known Assignment.................................... 585
8.3. Analog Parameter Settings List............................................................................586
8.4. Receiver General Analog Settings........................................................................ 588
8.4.1. XCVR_A10_RX_LINK..............................................................................588
8.4.2. XCVR_A10_RX_TERM_SEL......................................................................589
8.4.3. XCVR_VCCR_VCCT_VOLTAGE - RX............................................................589
8.5. Receiver Analog Equalization Settings.................................................................. 590
8.5.1. CTLE Settings........................................................................................ 590
8.5.2. VGA Settings......................................................................................... 593
8.5.3. Decision Feedback Equalizer (DFE) Settings.............................................. 594
8.6. Transmitter General Analog Settings.................................................................... 596
8.6.1. XCVR_A10_TX_LINK..............................................................................596
8.6.2. XCVR_A10_TX_TERM_SEL.......................................................................597
8.6.3. XCVR_A10_TX_COMPENSATION_EN........................................................ 597
8.6.4. XCVR_VCCR_VCCT_VOLTAGE - TX............................................................ 598
8.6.5. XCVR_A10_TX_SLEW_RATE_CTRL............................................................ 599
8.7. Transmitter Pre-Emphasis Analog Settings............................................................600
8.7.1. XCVR_A10_TX_PRE_EMP_SIGN_PRE_TAP_1T............................................600
8.7.2. XCVR_A10_TX_PRE_EMP_SIGN_PRE_TAP_2T............................................600
8.7.3. XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP........................................601
8.7.4. XCVR_A10_TX_PRE_EMP_SIGN_2ND_POST_TAP....................................... 601
8.7.5. XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T......................... 602
8.7.6. XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_2T......................... 602
8.7.7. XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP..................... 603
8.7.8. XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_2ND_POST_TAP.....................604
8.8. Transmitter VOD Settings....................................................................................604
8.8.1. XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL.............................................604
8.9. Dedicated Reference Clock Settings...................................................................... 605
8.9.1. XCVR_A10_REFCLK_TERM_TRISTATE.......................................................605
Contents
Intel
®
Arria
®
10 Transceiver PHY User Guide
6

Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex