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Renesas RL78 Series User Manual

Renesas RL78 Series
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RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1182
Dec 10, 2015
URS flag (reception status flag)
The URS flag is set to 1 upon start of reception. During reception, the flag retains 1.
Reception is started when:
 the start bit is detected.
The URS flag is cleared to 0 upon end of reception. While reception is halted, the flag retains 0.
Reception is ended when:
 the first stop bit is sampled.

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Renesas RL78 Series Specifications

General IconGeneral
CoreRL78
CPU Clock SpeedUp to 32 MHz
Flash MemoryUp to 512 KB
RAMUp to 32 KB
Operating Voltage1.6 V to 5.5 V
Low Power ModesHALT, STOP, SNOOZE
CPU Architecture16-bit
Temperature Range-40°C to +85°C
PackageLQFP
Timers16-bit timers
Communication InterfacesUART, I2C, LIN
A/D Converter12-bit

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