RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1191
Dec 10, 2015
UEBDCE bit (expansion bit/data comparison enable bit)
The UEBDCE bit enables or disables comparison between the 8-bit received data excluding the expansion bits and the
value of LIDBn register after detection of the expansion bit.
With 0 set, comparison between the received data in the LURDRn register and the LIDBn register value is disabled after
detection of the expansion bit value selected by the UEBDL bit as the expansion bit.
With 1 set, comparison between the received data in the LURDRn register and the LIDBn register value is enabled after
detection of the expansion bit value selected by the UEBDL bit as the expansion bit.
Set this bit when the OMM0 bit in the LMSTn register is 0 (LIN reset mode).
Do not set this bit to 1 with the UEBE bit set to 0 (expansion bit operation disabled).
Do not set this bit to 1 with the UECD bit set to 1 (expansion bit comparison disabled).
Do not set this bit to 1 when the UART buffer is in use.
Do not set this bit to 1 with the UWC bit in the LUSCn register set to 1 (start of reception from STOP mode enabled).
UTIGTS bit (transmission interrupt generation timing select bit)
The UTIGTS bit sets the generation timing of the transmission interrupt.
With 0 set, the transmission interrupt is generated at the start of transmission.
With 1 set, the transmission interrupt is generated at the completion of transmission.
When transmission from the UART buffer is performed with 0 set, the transmission interrupt is generated only at the start of
the transmission of the last data of the data length set with the MDL bits in the LDFCn register.
When transmission from the UART buffer is performed with 1 set, the transmission interrupt is generated only at the
completion of the transmission of the last data of the data length set with the MDL bits in the LDFCn register.
UECD bit (expansion bit comparison disable bit)
The UECD bit enables or disables comparison between the received expansion bit and the UEBDL bit value when the UEBE
bit is 1 (expansion bit operation is enabled).
With 0 set, comparison between the received expansion bit and the UEBDL bit value is enabled when the expansion bit is
received.
With 1 set, comparison between the received expansion bit and the UEBDL bit value is disabled when the expansion bit is
received.
Set this bit when the OMM0 bit in the LMSTn register is 0 (LIN reset mode).
Do not set this bit to 1 when the UART buffer is in use.
Do not set this bit to 1 with the UEBDCE bit set to 1 (data comparison after expansion bit detection is enabled).
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