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Renesas RL78 Series User Manual

Renesas RL78 Series
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RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1230
Dec 10, 2015
(c) Expansion Bit Reception (with Expansion Bit Comparison)
The LIN/UART module (in UART mode) can compare received expansion bits and the UEBDL bits when the
expansion bit enable bit (UEBE) in UART option register 1 (LUORn1) is 1, the expansion bit comparison disable
bit (UECD) is 0, and the expansion bit/data comparison enable bit (UEBDCE) is 0.
If the level that was set in the expansion bit detection level select bit (UEBDL) is detected, a LINn reception
status interrupt is generated upon completion of data reception, and the expansion bit detection flag (EXBT) in
the LIN/UART error status register (LESTn) is set. If the reversed value of an expansion bit detection level is
detected, a successful LINn reception interrupt is generated. In either case, the received data is stored in the
UART reception data register (LURDRn), unless there was an overrun error.
Figure 17-29 shows an example when the expansion bit detection level select bit (UEBDL) is set to 0.
Figure 17-29. Expansion Bit Reception Example (with Expansion Bit Comparison) (LSB First, UEBDL = 0)
Notes 1. If a reception error (parity error, framing error, or overrun error) occurs in received data 0, 2, or 4 (if a reversed
value of an expansion bit detection level is detected), a LINn reception status interrupt is generated, and the
error flag is updated. In this case, a successful LINn reception interrupt is not generated
2. If a reception error (parity error, framing error, or overrun error) occurs in received data 1 or 3 (if an expansion
bit detection level is detected), a LINn reception status interrupt is generated, and the error flag is updated.
In the case of an overrun error, the expansion bit detection flag (EXBT) is also set.
data0 1
07
8
data1 0
078
data2 1
0
Cleared
7 8
data3 0
078
data4 1
078
Cleared
INTLINnRVC
INTLINnSTA
LRXDn
EXBT bit in
LESTn register
(n = 0, 1)

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Renesas RL78 Series Specifications

General IconGeneral
CoreRL78
CPU Clock SpeedUp to 32 MHz
Flash MemoryUp to 512 KB
RAMUp to 32 KB
Operating Voltage1.6 V to 5.5 V
Low Power ModesHALT, STOP, SNOOZE
CPU Architecture16-bit
Temperature Range-40°C to +85°C
PackageLQFP
Timers16-bit timers
Communication InterfacesUART, I2C, LIN
A/D Converter12-bit

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