Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 26 VOLTAGE DETECTOR
R01UH0368EJ0210 Rev.2.10 1573
Dec 10, 2015
Notes 1. The LVIMK flag is set to 1 by reset signal generation.
2. After an interrupt is generated, perform the processing according to Figure 26-7 Processing Procedure
After an Interrupt Is Generated in interrupt and reset mode.
3. After a reset is released, perform the processing according to Figure 26-8 Initial Setting of Interrupt and
Reset Mode in interrupt and reset mode.
Remark V
POR: POR power supply rise detection voltage
V
PDR: POR power supply fall detection voltage

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit