Renesas RL78 Series User Manual

Index-18
18.3.79 CAN Global Test Configuration Register (GTSTCFG) ............................................................. 1376
18.3.80 CAN Global Test Control Register (GTSTCTRL) ..................................................................... 1377
18.3.81 CAN Global Test Protection Unlock Register (GLOCKK) ......................................................... 1378
18.3.82 CAN RAM Test Register r (RPGACCr) (r = 0 to 127) ............................................................... 1379
18.4 CAN Modes ............................................................................................................................. 1380
18.4.1 Global Modes ............................................................................................................................. 1380
18.4.2 Channel Modes .......................................................................................................................... 1382
18.5 Reception Function ................................................................................................................ 1387
18.5.1 Data Processing Using the Receive Rule Table ......................................................................... 1387
18.5.2 Timestamp .................................................................................................................................. 1389
18.6 Transmission Functions ........................................................................................................ 1390
18.6.1 Transmit Priority Determination .................................................................................................. 1390
18.6.2 Transmission Using Transmit Buffers ......................................................................................... 1391
18.6.3 Transmission Using FIFO Buffers .............................................................................................. 1392
18.6.4 Transmit History Function ........................................................................................................... 1394
18.7 Test Function .......................................................................................................................... 1395
18.7.1 Standard Test Mode ................................................................................................................... 1395
18.7.2 Listen-Only Mode ....................................................................................................................... 1395
18.7.3 Self-Test Mode (Loopback Mode) .............................................................................................. 1396
18.7.4 RAM Test ................................................................................................................................... 1396
18.8 Interrupt ................................................................................................................................... 1397
18.9 RAM Window ........................................................................................................................... 1401
18.10 Initial Settings ....................................................................................................................... 1402
18.10.1 Clock Setting ............................................................................................................................ 1404
18.10.2 Bit Timing Setting ..................................................................................................................... 1404
18.10.3 Communication Speed Setting ................................................................................................. 1405
18.10.4 Receive Rule Setting ................................................................................................................ 1407
18.10.5 Buffer Setting ............................................................................................................................ 1408
18.11 Reception Procedure ........................................................................................................... 1410
18.11.1 Receive Buffer Reading Procedure .......................................................................................... 1410
18.11.2 FIFO Buffer Reading Procedure ............................................................................................... 1412
18.12 Transmission Procedure ..................................................................................................... 1415
18.12.1 Procedure for Transmission from Transmit Buffers .................................................................. 1415
18.12.2 Procedure for Transmission from Transmit/Receive FIFO Buffers ........................................... 1418
18.12.3 Transmit History Buffer Reading Procedure ............................................................................. 1421
18.13 Test Settings ......................................................................................................................... 1422
18.13.1 Self-Test Mode Setting Procedure ........................................................................................... 1422
18.13.2 Protection Unlock Procedure .................................................................................................... 1423
18.13.3 RAM Test Setting Procedure .................................................................................................... 1424
18.14 Notes on the CAN Module ................................................................................................... 1425

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit