Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 4 PORT FUNCTIONS
R01UH0368EJ0210 Rev.2.10 265
Dec 10, 2015
Figure 4-44. Block Diagram of P73
P73/KR3/SSI11/
SNZOUT7/(CRXD0)
/
ANI29
WR PU
RD
WR
PORT
PU73
SSI11/KR3/
(CRXD0)
P73
EV DD
P-ch
PU7
P7
WR PM
PM7
PM73
PIM7
PIM73
WR PIM
WR PMC
PMC7
PMC73
WR PMS
PMS
PMS0
SNZOUT7
CMOS
(Schmitt3)
TTL
CMOS
(Schmitt1)
PITHL7
PITHL73
WR PITHL
Internal bus
Output latch
Alternate function
Alternate function
Selector
A/D converter
ADS
ADS4 to ADS0
P7: Port register 7
PU7: Pull-up resistor option register 7
PM7: Port mode register 7
PIM7: Port input mode register 7
PMC7: Port mode control register 7
PMS: Port mode select register
PITHL7: Port input threshold control register 7
ADS: Analog input channel specification register
RD: Read signal
WRxx: Write signal

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit