Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 15 SERIAL ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 847
Dec 10, 2015
(2) Operation procedure
Figure 15-34. Initial Setting Procedure for Master Reception
Figure 15-35. Procedure for Stopping Master Reception
Remarks 1. Even after communication is stopped, the pin level is retained. To resume the operation, re-set serial
output register m (SOm) (see Figure 15-36 Procedure for Resuming Master Reception).
2. m: Unit number (m = 0, 1), n: Channel number (n = 0, 1), mn = 00, 01, 10, 11
Starting setting to stop
Setting the STm register
Stopping communication
Write 1 to the STmn bit of the target
channel.
Stop communication in midway.
Set an operation mode, etc.
Starting initial setting
Setting the PER0 register
Setting the SPSm register
Setting the SMRmn register
Setting the SCRmn register
Setting the SDRmn register
Setting the SOm register
Setting port
Writing to the SSm register
Starting communication
Release the serial array unit from the
reset status and start clock supply.
Set the operation clock.
Set a communication format.
Set the initial output level of the serial clock
(
CKOmn
)
.
Enable clock output of the target channel
by setting a port register and a port mode
register.
Set dumm
y
data to the SDRmn register
and start communication.
Set the SSmn bit of the target channel to 1
and set the SEmn bit to 1 (to enable
operation).
Set a transfer baud rate.

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit