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ST STM32L4 5 Series - Page 1168

ST STM32L4 5 Series
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Low-power timer (LPTIM) RM0351
1168/1830 DocID024597 Rev 5
Note: When both OR_1 and OR_0 are set, LPTIM2 input 1 is connected to (COMP1_OUT OR
COMP2_OUT).
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. OR_1 OR_0
rw rw
Bits 31:2 Reserved, must be kept at reset value.
Bit 1 OR_1: Option register bit 1
0: LPTIM2 input 1 is connected to I/O
1: LPTIM2 input 1 is connected to COMP2_OUT
Bit 0 OR_0: Option register bit 0
0: LPTIM2 input 1 is connected to I/O
1: LPTIM2 input 1 is connected to COMP1_OUT

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