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ST STM32L4 5 Series - Figure 237. Control Circuit in External Clock Mode 1; Figure 238. External Trigger Input Block

ST STM32L4 5 Series
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DocID024597 Rev 5 897/1830
RM0351 Advanced-control timers (TIM1/TIM8)
981
Figure 237. Control circuit in external clock mode 1
External clock source mode 2
This mode is selected by writing ECE=1 in the TIMx_SMCR register.
The counter can count at each rising or falling edge on the external trigger input ETR.
The Figure 238 gives an overview of the external trigger input block.
Figure 238. External trigger input block
For example, to configure the upcounter to count each 2 rising edges on ETR, use the
following procedure:
&RXQWHUFORFN &.B&17 &.B36&
&RXQWHUUHJLVWHU
 
7,
&17B(1
7,)
:ULWH7,) 
069
([WHUQDOFORFN
PRGH
,QWHUQDOFORFN
PRGH
75*,
&.B,17
&.B36&
7,0[B60&5
606>@
069
LQWHUQDOFORFN
7,) RU
7,) RU
RU
(QFRGHU
PRGH
([WHUQDOFORFN
PRGH
(75)
(&(
7,0[B60&5
(73
(75SLQ
(75
'LYLGHU

)LOWHU
GRZQFRXQWHU
I
(753
7,0[B60&5
(736>@
7,0[B60&5
(7)>@
'76

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