DocID024597 Rev 5 473/1830
RM0351 Quad-SPI interface (QUADSPI)
500
17.4 QUADSPI functional description
17.4.1 QUADSPI block diagram
Figure 58. QUADSPI block diagram when dual-flash mode is disabled
Figure 59. QUADSPI block diagram when dual-flash mode is enabled
17.4.2 QUADSPI pins
Table 99 lists the QUADSPI pins, six for interfacing with a single Flash memory, or 10 to 11
for interfacing with two Flash memories (FLASH 1 and FLASH 2) in dual-flash mode.
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Table 99. QUADSPI pins
Signal name Signal type Description
CLK Digital output Clock to FLASH 1 and FLASH 2
BK1_IO0/SO Digital input/output
Bidirectional IO in dual/quad modes or serial output
in single mode, for FLASH 1
BK1_IO1/SI Digital input/output
Bidirectional IO in dual/quad modes or serial input
in single mode, for FLASH 1