Advanced encryption standard hardware accelerator (AES) RM0351
834/1830 DocID024597 Rev 5
Figure 201. Mode 1: encryption with 128-bit key length
28.9.2 Mode 2: key derivation
1. Disable the AES by resetting the EN bit in the AES_CR register.
2. Configure mode 2 by programming MODE[1:0] = 01 in the AES_CR register.
Note: CHMOD[2:0] bits are not significant in this case because this key derivation mode is
independent from the chaining algorithm selected.
3. Select key length 128-bit or 256-bit via KEYSIZE bits configuration in AES_CR register.
4. Write the AES_KEYRx registers with the encryption key to obtain the derivative key. A
write to the AES_IVRx has no effect.
5. Enable the AES by setting the EN bit in the AES_CR register.
6. Wait until the CCF flag is set in the AES_SR register.
7. The derivation key is put automatically into the AES_KEYRx registers. Read the
AES_KEYRx registers to obtain the decryption key if needed. The AES is disabled by
hardware. To restart a derivation key calculation, repeat steps 3, 4, 5 and 6.
Figure 202. Mode 2: key derivation with 128-bit key length
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