ST STM32L4 5 Series User Manual

Advanced encryption standard hardware accelerator (AES) RM0351
838/1830 DocID024597 Rev 5
28.12 Processing time
The following tables summarize the time required to process a 128-bit block for each mode
of operation.
Note: Mode 2 and mode 4 has no meaning when GCM is selected.
Mode operation (mode 1 to mode 4) has no meaning when GMAC/CMAC is used.
Table 175. Processing time (in clock cycle)
Mode of operation Input phase
Computation
phase
Output
phase
Total
Mode 1: Encryption 8 202 4 214
Mode 2: Key derivation - 80 - 80
Mode 3: Decryption 8 202 4 214
Mode 4: Key derivation + decryption 8 276 4 288
Table 176. Processing time (in clock cycle) for ECB, CBC and CTR
Key size Mode of operation Algorithm
Input
phase
Computation
phase
Output
phase
Total
128-bit
Mode 1: Encryption ECB, CBC, CTR 8 202 4 214
Mode 2: Key derivation - - 80 - 80
Mode 3: Decryption ECB, CBC, CTR 8 202 4 214
Mode 4: Key derivation + decryption ECB, CBC 8 276 4 288
256-bit
Mode 1: Encryption ECB, CBC, CTR 8 286 4 298
Mode 2: Key derivation - - 109 - 109
Mode 3: Decryption ECB, CBC, CTR 8 286 4 298
Mode 4: Key derivation + decryption ECB, CBC 8 380 4 392
Table 177. Processing time (in clock cycle) for GCM and CMAC
Key size Mode of operation Algorithm
Init
Phase
Header
phase
Payload
phase
Tag
phase
128-bit
Mode 1: Encryption/
Mode 3: Decryption
GCM 215 67 202 202
- GMAC 215 67 - 202
- CMAC - 206 - 202
256-bit
Mode 1: Encryption/
Mode 3: Decryption
GCM 299 67 286 286
- GMAC 299 67 - 286
- CMAC - 290 - 286

ST STM32L4 5 Series Specifications

General

Brand	ST
Model	STM32L4 5 Series
Category	Microcontrollers
Language	English