ST STM32L4 5 Series - Figure 359. Counter Timing Diagram, Internal Clock Divided by N; Preloaded)

DocID024597 Rev 5 1139/1830
RM0351 Basic timers (TIM6/TIM7)
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Figure 359. Counter timing diagram, internal clock divided by N
Figure 360. Counter timing diagram, update event when ARPE = 0 (TIMx_ARR not
preloaded)
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