ST STM32L4 5 Series - Figure 31. DMA2 Request Mapping; Table 45. Summary of the DMA1 Requests for each Channel

Direct memory access controller (DMA) RM0351
342/1830 DocID024597 Rev 5
Figure 31. DMA2 request mapping
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Table 45. Summary of the DMA1 requests for each channel
Request.
number
Channel 1 Channel 2 Channel 3 Channel 4 Channel 5 Channel 6 Channel 7
0 ADC1 ADC2 ADC3
DFSDM1_
FLT0
DFSDM1_
FLT1
DFSDM1_
FLT2
DFSDM1_
FLT3
1 - SPI1_RX SPI1_TX SPI2_RX SPI2_TX SAI2_A SAI2_B