DocID024597 Rev 5 99/1830
RM0351 Embedded Flash memory (FLASH)
136
Figure 5. Sequential 16-bit instructions execution
When the code is not sequential (branch), the instruction may not be present in the currently
used instruction line or in the prefetched instruction line. In this case (miss), the penalty in
terms of number of cycles is at least equal to the number of wait states.
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