ST STM32L4 5 Series - Figure 376. I2 C Bus Protocol

Inter-integrated circuit (I2C) interface RM0351
1236/1830 DocID024597 Rev 5
Data and addresses are transferred as 8-bit bytes, MSB first. The first byte(s) following the
START condition contain the address (one in 7-bit mode, two in 10-bit mode). The address
is always transmitted in Master mode.
A 9th clock pulse follows the 8 clock cycles of a byte transfer, during which the receiver must
send an acknowledge bit to the transmitter. Refer to the following figure.
Figure 376. I
2
C bus protocol
Acknowledge can be enabled or disabled by software. The I2C interface addresses can be
selected by software.
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