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ST STM32L4 5 Series - Table 30. Standby Mode

ST STM32L4 5 Series
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DocID024597 Rev 5 177/1830
RM0351 Power control (PWR)
198
Table 30. Standby mode
Standby mode Description
Mode entry
WFI (Wait for Interrupt) or WFE (Wait for Event) while:
SLEEPDEEP bit is set in Cortex
®
-M4 System Control register
No interrupt (for WFI) or event (for WFE) is pending
LPMS = “011” in PWR_CR1
WUFx bits are cleared in power status register 1 (PWR_SR1)
On return from ISR while:
SLEEPDEEP bit is set in Cortex
®
-M4 System Control register
SLEEPONEXIT = 1
No interrupt is pending
LPMS = “011” in PWR_CR1 and
WUFx bits are cleared in power status register 1 (PWR_SR1)
The RTC flag corresponding to the chosen wakeup source (RTC Alarm
A, RTC Alarm B, RTC wakeup, tamper or timestamp flags) is cleared
Mode exit
WKUPx pin edge, RTC event, external Reset in
NRST pin, IWDG Reset,
BOR reset
Wakeup latency Reset phase

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