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ST STM32L4 5 Series User Manual

ST STM32L4 5 Series
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Advanced encryption standard hardware accelerator (AES) RM0351
820/1830 DocID024597 Rev 5
to switch the AES to mode 3 (decryption mode), there is no need to write the AES_KEYRx
registers if their content corresponds to the derivation key (previously computed by mode 2).
In mode 4 (key derivation + decryption), the AES_KEYRx registers contain only the
encryption key. The derivation key is calculated internally without any write to these
registers.
28.5 AES chaining algorithms
Five algorithms are supported by the AES hardware and can be selected through the
CHMOD[2:0] bits in the AES_CR register when the AES is disabled (bit EN = 0):
Electronic codebook (ECB)
Cipher block chaining (CBC)
Counter mode (CTR)
Galois counter mode (GCM) and Galois message authentication code mode (GMAC)
Cipher message authentication code mode (CMAC)
28.5.1 Electronic codebook (ECB)
This is the default mode. This mode does not use the AES_IVR register. There are no
chaining operations. The message is divided into blocks and each block is encrypted
separately
.
Figure 191 and Figure 192 describe the principle of the electronic codebook algorithm for
encryption and decryption respectively.
Figure 191. ECB encryption mode
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ST STM32L4 5 Series Specifications

General IconGeneral
BrandST
ModelSTM32L4 5 Series
CategoryMicrocontrollers
LanguageEnglish

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