DocID024597 Rev 5 289/1830
RM0351 Clock recovery system (CRS) (only valid for STM32L496xx/4A6xx devices)
289
7.6.5 CRS register map
Refer to Section 2.2.2 on page 75 for the register boundary addresses.
Table 37. CRS register map and reset values
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x00
CRS_CR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
TRIM[5:0]
SWSYNC
AUTOTRIMEN
CEN
Res.
ESYNCIE
ERRIE
SYNCWARNIE
SYNCOKIE
Reset value 10000000000000
0x04
CRS_CFGR
SYNCPOL
Res.
SYNC
SRC
[1:0]
Res.
SYNC
DIV
[2:0]
FELIM[7:0] RELOAD[15:0]
Reset value 0 1 0 000001000101011101101111111
0x08
CRS_ISR FECAP[15:0]
FEDIR
Res.
Res.
Res.
Res.
TRIMOVF
SYNCMISS
SYNCERR
Res.
Res.
Res.
Res.
ESYNCF
ERRF
SYNCWARNF
SYNCOKF
Reset value 000 00000000000000 000 0000
0x0C
CRS_ICR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
ESYNCC
ERRC
SYNCWARNC
SYNCOKC
Reset value 0000
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