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ST STM32L4 5 Series User Manual

ST STM32L4 5 Series
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DocID024597 Rev 5 1055/1830
RM0351 General-purpose timers (TIM15/TIM16/TIM17)
1133
Figure 321. TIM15 block diagram
1. The internal break event source can be:
- A clock failure event generated by CSS. For further information on the CSS, refer to Section 6.2.10: Clock security
system (CSS)
- A PVD output
- SRAM parity error signal
- Cortex
®
-M4 LOCKUP (Hardfault) output
- COMP output
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ST STM32L4 5 Series Specifications

General IconGeneral
BrandST
ModelSTM32L4 5 Series
CategoryMicrocontrollers
LanguageEnglish

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