ST STM32L4 5 Series User Manual

Digital filter for sigma delta modulators (DFSDM) RM0351
704/1830 DocID024597 Rev 5
STM32L496xx/4A6xx devices.
24.4.2 DFSDM pins and internal signals
Table 152. DFSDM external pins
Name Signal Type Remarks
VDD Power supply Digital power supply.
VSS Power supply Digital ground power supply.
CKIN[7:0] Clock input Clock signal provided from external  modulator. FT input.
DATIN[7:0] Data input Data signal provided from external  modulator. FT input.
CKOUT Clock output
Clock output to provide clock signal into external 
modulator.
EXTRG[1:0]
External trigger
signal
Input trigger from two EXTI signals to start analog
conversion (from GPIOs: EXTI11, EXTI15).
Table 153. DFSDM internal signals
Name Signal Type Remarks
dfsdm_jtrg[10:0]
Internal/
external
trigger signal
Input trigger from internal/external trigger sources to start
analog conversion, see Ta ble 1 54 for details.
dfsdm_break[3:0]
break signal
output
Break signals event generation from Analog watchdog or
short-circuit detector
dfsdm_dma[3:0]
DMA request
signal
DMA request signal from each DFSDM_FLTx (x=0..3):
end of injected conversion event.
dfsdm_it[3:0]
Interrupt
request signal
Interrupt signal for each DFSDM_FLTx (x=0..3)
dfsdm_dat_adc[15:0]
(1)
1. STM32L496xx/4A6xx devices only.
ADC input
data
Up to 4 internal ADC data buses as parallel inputs.
Table 154. DFSDM triggers connection
Trigger name Trigger source
dfsdm_jtrg0 TIM1_TRGO
dfsdm_jtrg1 TIM1_TRGO2
dfsdm_jtrg2 TIM8_TRGO
dfsdm_jtrg3 TIM8_TRGO2
dfsdm_jtrg4 TIM3_TRGO
dfsdm_jtrg5 TIM4_TRGO
dfsdm_jtrg6 TIM16_OC1
dfsdm_jtrg7 TIM6_TRGO
dfsdm_jtrg8 TIM7_TRGO

ST STM32L4 5 Series Specifications

General

Brand	ST
Model	STM32L4 5 Series
Category	Microcontrollers
Language	English