ST STM32L4 5 Series - Figure 132. DMA Requests in Regular Simultaneous Mode When Mdma=0 B10; Figure 133. DMA Requests in Interleaved Mode When Mdma=0 B10

DocID024597 Rev 5 573/1830
RM0351 Analog-to-digital converters (ADC)
614
Figure 132. DMA requests in regular simultaneous mode when MDMA=0b10
Figure 133. DMA requests in interleaved mode when MDMA=0b10
06Y9
$'&0DVWHUUHJXODU
$'&6ODYH(2&
&+
7ULJJHU
&+
7ULJJHU
&+
&+
&RQILJXUDWLRQZKHUHHDFKVHTXHQFHFRQWDLQVRQO\RQHFRQYHUVLRQ
$'&6ODYHUHJXODU
$'&6ODYH(2&
'0$UHTXHVWIURP
$'&0DVWHU
'0$UHTXHVWIURP
$'&6ODYH
&+
7ULJJHU
&+
7ULJJHU
&+
&+
06Y9
$'&0DVWHUUHJXODU
$'&0DVWHU(2&
&+
7ULJJHU
&+
7ULJJHU
&+
&RQILJXUDWLRQZKHUHHDFKVHTXHQFHFRQWDLQVRQO\RQHFRQYHUVLRQ
$'&6ODYHUHJXODU
$'&6ODYH(2&
'0$UHTXHVWIURP
$'&0DVWHU
'0$UHTXHVWIURP
$'&6ODYH
7ULJJHU
7ULJJHU
&+
&+
&+
7ULJJHU
'HOD\
&+
'HOD\
'HOD\
&+
&+
'HOD\
&+
'HOD\