ST STM32L4 5 Series - Figure 396. Transfer Sequence Flowchart for I2 C Master Receiver for N >255 Bytes

DocID024597 Rev 5 1263/1830
RM0351 Inter-integrated circuit (I2C) interface
1301
Figure 396. Transfer sequence flowchart for I2C master receiver for N >255 bytes
D^ϭϵϴϲϰsϮ
0DVWHULQLWLDOL]DWLRQ
0DVWHUUHFHSWLRQ
5HDG,&B5;'5
,&B,655;1(
"
1R
<HV
1%<7(6 [))1 1
5(/2$' 
&RQILJXUHVODYHDGGUHVV
6HW,&B&567$57
1%<7(6
UHFHLYHG"
,&B,657& 
"
<HV
(QG
1R
<HV
1R
6HW,&B&567$57ZLWK
VODYHDGGHVV1%<7(6
,&B,657&5
"
<HV
,)1
1%<7(6 11 5(/2$' 
$872(1' IRU5(67$57IRU6723
(/6(
1%<7(6 [))1 1
5(/2$' 
1R