ST STM32L4 5 Series User Manual

DocID024597 Rev 5 459/1830
RM0351 Flexible static memory controller (FSMC)
471
Theoretically, there is no capacity limitation as the FMC can manage as many address
cycles as needed.
16-bit NAND Flash memory
Theoretically, there is no capacity limitation as the FMC can manage as many address
cycles as needed.
NCE O Chip Select
NOE(= NRE) O Output enable (memory signal name: read enable, NRE)
NWE O Write enable
NWAIT/INT I NAND Flash ready/busy input signal to the FMC
Table 94. 16-bit NAND Flash
FMC signal name I/O Function
A[17] O NAND Flash address latch enable (ALE) signal
A[16] O NAND Flash command latch enable (CLE) signal
D[15:0] I/O 16-bit multiplexed, bidirectional address/data bus
NCE O Chip Select
NOE(= NRE) O Output enable (memory signal name: read enable, NRE)
NWE O Write enable
NWAIT/INT I NAND Flash ready/busy input signal to the FMC
Table 93. 8-bit NAND Flash (continued)
FMC signal name I/O Function

ST STM32L4 5 Series Specifications

General

Brand	ST
Model	STM32L4 5 Series
Category	Microcontrollers
Language	English