DocID024597 Rev 5 825/1830
RM0351 Advanced encryption standard hardware accelerator (AES)
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28.5.3 Counter Mode (CTR)
In counter mode, a 32-bit counter is used in addition to a nonce value for the XOR operation
with the cipher text or plain text (refer to Figure 196 and Figure 197).
Figure 196. CTR mode encryption
Figure 197. CTR mode decryption
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