DocID024597 Rev 5 1645/1830
RM0351 USB on-the-go full-speed (OTG_FS)
1774
Figure 525. Interrupt hierarchy
1. The core interrupt register bits are shown in OTG core interrupt register (OTG_GINTSTS) on page 1659.
!.$
/2
)NTERRUPT
'LOBALINTERRUPT
MASK"IT
!("CONFIGURATION
REGISTER
#OREINTERRUPTMASK
REGISTER
/4'
INTERRUPT
REGISTER
#OREINTERRUPT
REGISTER
$EVICE)./54ENDPOINT
INTERRUPTREGISTERSTO
$EVICEALLENDPOINTS
INTERRUPTREGISTER
/54ENDPOINTS
).ENDPOINTS
)NTERRUPT
SOURCES
(OSTPORTCONTROLANDSTATUS
REGISTER
(OSTALLCHANNELSINTERRUPT
REGISTER
(OSTCHANNELSINTERRUPT
MASKREGISTERSTO
(OSTALLCHANNELS
INTERRUPTMASKREGISTER
(OSTCHANNELSINTERRUPT
REGISTERSTO
$EVICEALLENDPOINTS
INTERRUPTMASKREGISTER
$EVICE)./54
ENDPOINTSCOMMON
INTERRUPTMASKREGISTER
-3V6
/2
!.$
$EVICEEACH)./54ENDPOINT
INTERRUPTMASKREGISTER
$EVICEEACHENDPOINT
INTERRUPTREGISTER
%0/54
%0).
$EVICEEACHENDPOINT
INTERRUPTMASKREGISTER
ENDP?INTERRUPT;=
ENDP?MULTI?PROC?INTRPT
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