ST STM32L4 5 Series - Figure 490. Sequential Read Operation; Figure 491. Sequential Write Operation; Figure 492. SDMMC Block Diagram

SD/SDIO/MMC card host interface (SDMMC) RM0351
1520/1830 DocID024597 Rev 5
Figure 490. Sequential read operation
Figure 491. Sequential write operation
45.3 SDMMC functional description
The SDMMC consists of two parts:
• The SDMMC adapter block provides all functions specific to the MMC/SD/SD I/O card
such as the clock generation unit, command and data transfer.
• The APB2 interface accesses the SDMMC adapter registers, and generates interrupt
and DMA request signals.
Figure 492. SDMMC block diagram
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