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ST STM32L4 5 Series User Manual

ST STM32L4 5 Series
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DocID024597 Rev 5 1647/1830
RM0351 USB on-the-go full-speed (OTG_FS)
1774
Host-mode CSR map
These registers must be programmed every time the core changes to host mode.
OTG_GRXSTSR 0x01C
OTG_FS Receive status debug read/OTG status read and pop registers
(OTG_GRXSTSR/OTG_GRXSTSP) on page 1667
OTG_GRXSTSP 0x020
OTG_GRXFSIZ 0x024 OTG Receive FIFO size register (OTG_GRXFSIZ) on page 1668
OTG_HNPTXFSIZ/
OTG_DIEPTXF0
(1)
0x028
OTG Host non-periodic transmit FIFO size register
(OTG_HNPTXFSIZ)/Endpoint 0 Transmit FIFO size (OTG_DIEPTXF0)
OTG_HNPTXSTS 0x02C
OTG non-periodic transmit FIFO/queue status register (OTG_HNPTXSTS)
on page 1670
OTG_GCCFG 0x038 OTG general core configuration register (OTG_GCCFG) on page 1671
OTG_CID 0x03C OTG core ID register (OTG_CID) on page 1672
OTG_GLPMCFG 0x54 OTG core LPM configuration register (OTG_GLPMCFG) on page 1673
OTG_GPWRDN 0x058 OTG power down register (OTG_GPWRDN) on page 1676
OTG_GADPCTL 0x060 OTG ADP timer, control and status register (OTG_GADPCTL) on page 1677
OTG_HPTXFSIZ 0x100
OTG Host periodic transmit FIFO size register (OTG_HPTXFSIZ) on
page 1679
OTG_DIEPTXFx
0x104
0x124
...
0x184
OTG device IN endpoint transmit FIFO size register (OTG_DIEPTXFx)
(x = 1..5, where x is the FIFO_number) on page 1679
1. The general rule is to use OTG_HNPTXFSIZ for host mode and OTG_DIEPTXF0 for device mode.
Table 302. Core global control and status registers (CSRs) (continued)
Acronym
Address
offset
Register name
Table 303. Host-mode control and status registers (CSRs)
Acronym
Offset
address
Register name
OTG_HCFG 0x400 OTG Host configuration register (OTG_HCFG) on page 1680
OTG_HFIR 0x404 OTG Host frame interval register (OTG_HFIR) on page 1681
OTG_HFNUM 0x408
OTG Host frame number/frame time remaining register (OTG_HFNUM) on
page 1682
OTG_HPTXSTS 0x410
OTG_Host periodic transmit FIFO/queue status register (OTG_HPTXSTS)
on page 1682
OTG_HAINT 0x414 OTG Host all channels interrupt register (OTG_HAINT) on page 1683
OTG_HAINTMSK 0x418
OTG Host all channels interrupt mask register (OTG_HAINTMSK) on
page 1684
OTG_HPRT 0x440 OTG Host port control and status register (OTG_HPRT) on page 1684

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ST STM32L4 5 Series Specifications

General IconGeneral
BrandST
ModelSTM32L4 5 Series
CategoryMicrocontrollers
LanguageEnglish

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